1. Field of the Invention
The present invention relates, in general, to a method and system for use with integrated circuits transmitting and receiving digital data over a parallel data bus of defined width. Specifically, the present invention relates to a method and system, for use with integrated circuits transmitting and receiving digital data over a parallel data bus of defined width, and which provide a significant increase in the integrated circuits' parallel digital data transmission rate without increasing the width of the parallel data bus of defined width.
2. Description of Related Art
An integrated circuit is a device consisting of a number of connected circuit elements, such as transistors and resistors and functional combinations thereof, fabricated on a single chip of silicon crystal or other semiconductor material. In integrated circuit fabrication technology, an ever-increasing number of integrated circuit devices are being built into chips. This growing number of devices requires a correspondingly greater number of input/output (I/O) connections to and from the chip.
After fabrication, the integrated circuits are generally utilized to perform a function in some overall system (for example, Application Specific Integrated Circuits are now being utilized to perform many specialized features in network server computers). In order to function with other circuit components in such an overall system, the integrated circuits must communicate with them. Such communication is typically achieved via conducting paths laid out on what is known as a printed circuit board.
A printed circuit board is typically a flat board made of non-conducting material, such as plastic or fiberglass, on which chips (including, but not limited to, integrated circuits) and other electronic components are mounted, usually in pre-drilled holes designed to hold them. The component holes are connected electrically by predefined conductive metal pathways that are printed on the surface of the board. The metal leads protruding from the electronic components are soldered to the conductive metal pathways to form a connection. More recently, surface mount technology has been utilized to affix components to printed circuit boards without requiring pins and through holes.
Each set of conductive metal pathways, connected to the metal leads protruding from the electronic components, is typically referred to as a parallel data bus. A parallel data bus is characterized by the number of bits it can transfer at a single time, equivalent to the number of parallel conducting paths (which can be thought of as wires) wired to the metal leads of an integrated circuit. The number of these parallel conducting paths is typically referred to as the width of the bus.
The miniaturization of integrated circuits has made it possible to pack more and more data processing power into a small volume. The increased data processing power has made it necessary to provide more metal leads (I/O connections for the integrated circuit) for each integrated circuit. However, the small volume of the integrated circuit has also resulted in such metal leads being tightly spaced. Consequently, on a printed circuit board utilizing modern integrated circuits, the I/O connections of the integrated circuits are physically very close. Accordingly, the conductive paths, at least where they connect with individual I/O connections, are also in very close proximity to each other.
It can be seen that merely from the standpoint of spatial dimensions, there has to be an upper limit of the amount of conductors that can be placed in parallel. However, long before that spatial limit is reached, electromagnetic interference (e.g., coupling effects) between such parallel conductors starts to impinge upon the effectiveness of data transmission, since at some point such interference effects make the placing of more conductors in parallel impracticable.
While a limit of number of conductors practicably connected in parallel is rapidly approaching, the processing power of integrated circuits continues to increase while the volume of the integrated circuits continues to shrink. Each advance in integrated circuits typically requires an increase in bus width to transmit the processed data on and off chip; that is, data bus requirements of integrated circuits have gone from 16 to 32 to 64 to 128 line buses, with some of the more recent advances requiring 256 lines or higher, with no end to bus requirements in sight. However, as noted, the physical constraints of data bus width are becoming a problem, and the trends indicate that the data bus itself will become a data processing bottleneck in the very near future, by which it is meant that the integrated circuits can process, present, and receive parallel data faster than available parallel data buses can transfer such data into and out of the integrated circuits.
It is therefore apparent that a need exists for a method and system which provide an increase in parallel digital data transmission rate over a parallel bus of defined width, but without a concomitant increase of new lines or conductors to the parallel bus of defined width.